OP07

芯片信息

型号 封装 在线定购
OP07CPZ(查看) PDIP8
OP07CSZ(查看) SOIC8
OP07EPZ(查看) PDIP8

引脚布局

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技术资料—— OP07 PDF技术资料

OP07 概述

The OP07 has very low input offset voltage (75 µV max for OP07E) that is obtained by trimming at the wafer stage. These low offset voltages generally eliminate any need for external nulling. The OP07 also features low input bias current (±4 nA for the OP07E) and high open-loop gain (200 V/mV for the OP07E).The low offsets and high open-loop gain make the OP07 particularly useful for high gain instrumentation applications.

The OP07 is available in two standard performance grades. The OP07E is specified for operation over the 0°C to 70°C range, and the OP07C is specified over the –40°C to +85°C temperature range.

The OP07 is available in epoxy 8-lead PDIP and 8-lead SOIC. It is a direct replacement for 725, 108A, and OP05 amplifiers.

OP07 参数
OP07 基本参数
SR   0.3 V/µs
GBW   0.6 MHz
Vos   30 µV
Ib   1 nA
OP07 其他特性
工作电压   ±3V~18V
Channels   1
工作温度   商业, 工业
OP07 封装与引脚
PDIP8, SOIC8

OP07 特性

  • Low Vos: 75 µV Max
  • Low Vos Drift: 1.3 µV/°C Max
  • Ultrastable vs. Time: 1.5 µV/Month Max
  • Low Noise: 0.6 µV p-p Max
  • Wide Input Voltage Range: ±14 V
  • Wide Supply Voltage Range: 3 V to 18 V
  • Fits 725, 108A/308A, 741, AD510 Sockets
  • 125°C Temperature-Tested Dice