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M25PX64 概述

The M25PX64 is a 64-Mbit (8 Mbits x 8) serial flash memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus.

The M25PX64 supports two new, high-performance dual input/output instructions:
- Dual output fast read (DOFR) instruction used to read data at up to 75 MHz by using both pin DQ1 and pin DQ0 as outputs.
- Dual input fast program (DIFP) instruction used to program data at up to 75 MHz by using both pin DQ1 and pin DQ0 as inputs.

These new instructions double the transfer bandwidth for read and program operations. The memory can be programmed 1 to 256 bytes at a time, using the page program instruction. It is organized as 128 sectors that are further divided into 16 subsectors each (2048 subsectors in total).

M25PX64 特性

• SPI bus compatible serial interface.
• 75 MHz (maximum) clock frequency.
• 2.7 V to 3.6 V single supply voltage
• Dual input/output instructions resulting in an equivalent clock frequency of 150 MHz:
  - Dual output fast read instruction.
  - Dual input fast program instruction.
• Whole memory continuously read by sending once a fast read or a dual output fast read instruction and an address.
• 64 Mbit Flash memory
  - Uniform 4-Kbyte subsectors.
  - Uniform 64-Kbyte sectors.
• Additional 64-byte user-lockable, one-time programmable (OTP) area.
• Erase capability
  - Subsector (4-Kbyte) granularity.
  - Sector (64-Kbyte) granularity.
  - Bulk erase (64 Mbits) in 68 s (typical).
  
• Write protections
  - Software write protection applicable to every 64-Kbyte sector (volatile lock bit).
  - Hardware write protection: protected area size defined by three non-volatile bits (BP0, BP1 and BP2).
• Deep power-down mode: 5 μA (typical).
• Electronic signature
  - JEDEC standard two-byte signature (7117h).
  - Unique ID code (UID) with 16 bytes readonly, available upon customer request.
• More than 100 000 write cycles per sector.
• More than 20 years data retention.
• Packages
  - RoHS compliant.