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ENC28J60

订购信息

型号 封装 在线定购
ENC28J60/SS(查看) SSOP28
ENC28J60-I/ML(查看) QFN28
ENC28J60-I/SO(查看) SOIC28
ENC28J60-I/SP(查看) SPDIP28
ENC28J60-I/SS(查看) SSOP28
ENC28J60T/SS(查看) SSOP28
ENC28J60T-I/ML(查看) QFN28
ENC28J60T-I/SO(查看) SOIC28
ENC28J60T-I/SS(查看) SSOP28

引脚布局

(点击图片看大图)
技术资料—— ENC28J60 PDF技术资料
ENC28J60 参数
ENC28J60 性能参数
MAC Yes
PHY Yes
TX/RX RAM Buffer(bytes) 8192
Interrupt Pin 1
LEDs 2
工作电压 (V) 3.3
最大工作速度 (MHz) 25
接口 SPI
Pre-Programmed MAC Address No
安全引擎 No
独立的以太网控制器 10Base-T
工作温度范围 –40 to 85 °C
ENC28J60 封装与引脚
SSOP28, QFN28, SOIC28, SPDIP28

ENC28J60 概述

ENC28J60 is a 28-pin, 10BASE-T stand alone Ethernet Controller with on board MAC & PHY, 8 Kbytes of Buffer RAM and an SPI serial interface. With a small foot print package size the ENC28J60 minimizes complexity, board space and cost. Target applications include VoIP, Industrial Automation, Building Automation, Home Control, Security and Instrumentation.

ENC28J60 特性

  • General:
    • IEEE 802.3 compatible Ethernet Controller
    • Integrated MAC and 10BASE-T PHY
    • 8 Kbyte Transmit/Receive Packet Dual Port Buffer SRAM
    • Programmable Automatic Retransmit on Collision
    • Programmable Padding and CRC Generation
    • Programmable Automatic Rejection of Erroneous Packets
  • Buffer:
    • Configurable transmit/receive buffer size
    • Hardware managed circular receive FIFO
    • Byte-wide random and sequential access
    • Internal DMA for fast memory copying
    • Hardware assisted IP checksum calculation
  • PHY:
    • Wave shaping output filter
    • Loopback mode
  • MAC:
    • Support for Unicast, Multicast and Broadcast packets
    • Programmable pattern matching of up to 64 bytes within packet at user defined offset
    • Programmable wake-up on multiple packet formats, including Magic Packet®, Unicast, Multicast, Broadcast, specific packet match or any packet
  • Packaging: SOIC, SPDIP, SSOP, QFN